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formality打开gui界面,看mismatch,这个字符这么乱,有没有遇到过?
ExASIC1
asked May 27
0 0 9
formality
fib 55nm,工艺节点的好不好做?
ExASIC1
asked May 27
0 0 5
测试
DVFS有大佬了解吗?
ExASIC1
asked May 27
0 1 13
lowpower
如何从波形中查看建立时间保持时间
zj5150181
asked May 25
0 1 19
dc verilog sta
小调查:大家在用哪个版本管理工具
ExASIC1
asked May 25
0 0 8
调查 linux
spi vip做为master读操作产生的的数据怎么获取呢
ExASIC1
asked May 25
0 0 5
vip uvm verification
dc_shell遇到libtiff.so.3找不到,cannot open shared object file: No such file or directory
ExASIC1
asked May 22
0 1 13
eda linux
有人了解sg2042的核是用的算能自研的微结构么
ExASIC1
asked May 6
0 0 10
design
哪些情况下RM会出现伪PASS
ExASIC1
asked May 6
0 0 12
verification
verdi中某些struct中信号显示是NF是啥原因
ExASIC1
asked May 6
0 0 31
verification verdi
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