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IC技术圈问答
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matlab算法移植到FPGA有什么好的方法
ExASIC
1
asked May 6
0
1
63
算法
design
DFF的reset和set哪个优先级高
ExASIC
1
asked May 6
0
0
12
design
VCS三步法用的公司多不多
ExASIC
1
asked May 6
0
0
17
vcs
verification
有没有比较好的regression环境
ExASIC
1
asked May 6
0
1
38
script
verification
innovus里怎么做captable
ExASIC
1
asked Apr 21
0
1
25
backend
怎么把lib转成db
ExASIC
1
asked Apr 21
0
1
49
synthesis
sed怎么把文件的每一行复制一次
ExASIC
1
asked Apr 20
0
4
55
linux
两种Verilog写法综合结果是一样的吗?
embedbird
1
asked Apr 20
0
1
71
verilog
用sv做设计的公司多吗
ExASIC
1
asked Apr 19
0
0
16
systemverilog
design
a <= 1'b0,a是一个多位宽寄存器,复位时a的所有 bit会全部变0吗?
ExASIC
1
asked Apr 17
0
4
42
design
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