You need to enable JavaScript to run this app.
IC技术圈问答
Questions
Tags
verification
验证
61 Questions
用synplify做fpga综合,然后把综合后的.vm文件做vcs仿真,端口全是高阻。有人遇到过吗
ExASIC
1
•
asked May 27
0
0
6
verification
VCS仿真可以用simprofile分析耗时,xrun用哪个开关呢
ExASIC
1
•
asked May 27
0
1
8
verification
spi vip做为master读操作产生的的数据怎么获取呢
ExASIC
1
•
asked May 25
0
0
5
vip
uvm
verification
哪些情况下RM会出现伪PASS
ExASIC
1
•
asked May 6
0
0
12
verification
verdi中某些struct中信号显示是NF是啥原因
ExASIC
1
•
asked May 6
0
0
31
verification
verdi
VCS三步法用的公司多不多
ExASIC
1
•
asked May 6
0
0
17
vcs
verification
有没有比较好的regression环境
ExASIC
1
•
asked May 6
0
1
38
script
verification
kdb has been updated by other process问题
ExASIC
1
•
asked Apr 15
0
0
58
verification
verdi
什么是systemrdl?
ExASIC
1
•
asked Apr 15
0
2
24
design
verification
怎么看sdf文件的版本
ExASIC
1
•
asked Apr 15
0
0
18
backend
verification
1
(current)
2
3
4
5
Next
Next